The present invention relates, in general, to semiconductor devices and, more particularly to the packaging of semiconductor devices.
Generally, discrete semiconductor devices such as diodes, resistors, capacitors, etc. are packaged into epoxy-molded or ceramic packages. An initial step in a packaging process for a discrete device, e.g., a diode, is forming a solder ball-lead assembly by attaching two solder balls to two leads via a first reflow step. The two leads are placed adjacent the diode die so that the two solder balls are in contact with two bonding pads on the diode die. In a second reflow step, the two solder balls form solder bumps bonding the two leads to the diode die. The diode die is then enclosed in an epoxy molding material to form an epoxy-molded package with the two leads protruding therefrom.
The conventional packaging process requires at least two reflow steps which are time consuming and cost inefficient. Attaching solder balls to the leads and placing the leads adjacent to the die are labor intensive. The epoxy-molding process is also expensive. Further, in a molding process, approximately 50% of the epoxy resin is wasted as scrap. In addition, the inconsistency in size and shape of the solder bumps and misalignment of the leads to the die often degrade the yield, reliability, and performance of the device.
Accordingly, it would be advantageous to have a simple and reliable method for packaging a semiconductor device. It is desirable for the method to be time, material, and cost efficient. It is also desirable for the method to be compatible with existing device fabrication processes.